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3.11.1.2 ECC Configuration Sub-Menu
This menu allows the user to configure ECC setup for system &
DRAM. Use the up and down arrow (Ç/È) keys to select an item.
Use the Plus and Minus (+/-) keys to change the value of the
selected option.
BIOS Setup Utility
Main Advanced PCI/PnP Boot Security Chipset Exit
ECC Configuration
DRAM ECC Enable
4-Bit ECC Mode
DRAM SCRUB REDIRECT
DRAM BG Scrub
L2 Cache BG Scrub
Data Cache BG Scrub
[Enabled]
[Disabled]
[Disabled]
[Disabled]
[Disabled]
[Disabled]
DRAM ECC allows
hardware to report and
correct memory errors
automatically
maintaining system
integrity.
← → Select Screen
↑↓ Select Item
+/- Change Option
F1 General Help
F10 Save and Exit
ESC Exit
Feature Option Description
ECC Configuration
Enabled
DRAM ECC Enable
Disabled
DRAM ECC allows hardware to report and
correct memory errors automatically
maintaining system integrity.
Disabled
4-Bit ECC Mode
Enabled
Enable 4-Bit ECC Mode.
Note: Also known as CHIPKILL ECC Mode
Disabled
DRAM SCRUB
REDIRECT
Enabled
DRAM SCRUB REDIRECT allows the
system to correct DRAM ECC errors
immediately when they occur, even if
background scrubbing is on.
Disabled
40ns
80ns
160ns
320ns
640ns
1.28us
2.56us
5.12us
10.2us
20.5us
41.0us
81.9us
163.8us
327.7us
DRAM BG Scrub
655.4us
DRAM scrubbing corrects memory errors so
later reads are correct. Doing this while
memory is not being used improves
performance.
Note: When AMD’s node interleave feature
is enabled, BIOS will force DRAM scrub off.
DisabledL2 Cache BG Scrub
40ns
Allows the L2 Data Cache RAM to be
corrected while idle.
70