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PCI-X v5.1 165 Getting Started Guide www.xilinx.com 29
UG158 March 24, 2008
Mentor Graphics ModelSim
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Most of the files listed are related to the example design and its test bench. For other
test benches, the following subset must be used for proper simulation of the core
interface:
../source/glbl.v
../../src/xpci/pcix_lc.v
../../src/xpci/pcix_core.v
+libext+.vmd+.v
-y <Xilinx Install Path>/verilog/src/unisims
-y <Xilinx Install Path>/verilog/src/simprims
This list does not include any configuration file, user application, top level wrapper, or
test bench. These additional files are required for a meaningful simulation.
5. Invoke ModelSim and ensure that the current directory is set to the following:
<Install Path>/verilog/example/func_sim
6. To run the simulation, type the following:
do modelsim.do
This compiles all modules, loads them into the simulator, displays the waveform
viewer, and runs the simulation.
VHDL
1. Navigate to the functional simulation directory:
cd <Install Path>/vhdl/example/func_sim
2. View the test.files file. This file lists the individual source files required, and is
shown below:
../../src/xpci/pcix_lc.vhd
../../src/xpci/pcix_core.vhd
../source/cfg_test_s.vhd
../source/userapp.vhd
../source/pcix_top.vhd
../source/busrec.vhd
../source/stimulus.vhd
../source/test_tb.vhd
If you have changed the wrapper file make sure you are using the correct simulation
model. Most of the files listed are related to the example design and its test bench. For
other test benches, the following subset must be used for proper simulation of the
core interface:
../../src/xpci/pcix_lc.vhd
../../src/xpci/pcix_core.vhd
This subset list does not include any configuration file, user application, top level
wrapper, or test bench. These additional files are required for a meaningful simulation.
3. Invoke ModelSim, and ensure that the current directory is set to the following:
<Install Path>/vhdl/example/func_sim
4. Create the SimPrim and UniSim libraries. This step only needs to be done once, the
first time you perform a simulation: