32 www.xilinx.com PCI-X v5.1 165 Getting Started Guide
UG158 March 24, 2008
Chapter 5: Synthesizing a Design
R
2. Under File Type, select Project File and enter the project name (flowtest in this example)
and synthesis directory:
<Install Path>/verilog/example/synthesis
3. Click OK to return to the project window (Figure 5-2).
4. To add source files to the new project, click Add. The first file (used by any design that
instantiates Xilinx primitives) is located in:
<Synplicity Install Path>/lib/xilinx
Figure 5-2: Main Project Window