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ASUS XG-DLS User’s Manual46
IV. BIOS SOFTWARE
IV. BIOS
Chipset Features
Chipset Features Setup
The “Chipset Features Setup” option controls the configuration of the board’s chipset.
NOTE: SETUP Defaults are noted in parenthesis next to each function heading.
Details of Chipset Features Setup
SDRAM Configuration (By SPD)
This sets the optimal timings of settings for items 2–5, depending on the memory
modules that you are using. Default setting is By SPD, which configures items 2–5
by reading the contents in the SPD (Serial Presence Detect) device. This 8-pin serial
EEPROM device stores critical parameter information about the module, such as
memory type, size, speed, voltage interface, and module banks.
SDRAM CAS Latency
This controls the latency between SDRAM read command and the time that the data
actually becomes available. Leave on default setting.
SDRAM RAS to CAS Delay
This controls the latency between SDRAM active command and the read/write com-
mand. Leave on default setting.
SDRAM RAS Precharge Time
This controls the idle clocks after issuing a precharge command to SDRAM. Leave
on default setting.
DRAM Idle Timer
This controls the idle clocks before closing an opened SDRAM page. Leave on
default setting.
SDRAM MA Wait State (Normal)
This controls the leadoff clocks for CPU read cycles. Leave on default setting.
Snoop Ahead (Enabled)
Enabled will allow PCI streaming. Leave on default setting.
Host Bus Fast Data Ready (Disabled)
Leave on default setting.