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S1C6200/6200A CORE CPU MANUAL EPSON 19
3 INSTRUCTION SET
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B
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
A
1
1
1
1
1
1
1
1
0
1
0
0
1
0
1
0
1
0
1
0
1
1
1
1
0
1
1
1
1
1
1
1
1
9
1
1
1
1
1
1
1
0
1
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
1
0
8
1
1
1
1
1
1
1
0
0
0
0
0
1
0
0
0
0
0
1
0
1
1
1
1
0
0
1
1
1
1
1
1
1
7
1
1
1
1
1
1
1
0
1
0
1
1
0
1
1
1
1
1
0
1
1
0
1
0
1
1
0
0
0
0
0
0
0
6
1
1
1
1
1
1
1
0
0
1
0
0
1
0
0
1
1
1
0
1
1
0
0
0
1
0
1
1
0
0
0
0
0
5
0
0
0
1
1
1
1
r1
0
r1
0
1
r1
1
r1
0
r1
0
r1
1
r1
0
r1
0
1
0
1
1
1
1
1
1
r1
4
1
1
1
0
1
0
1
r0
0
r0
1
0
r0
1
r0
0
r0
1
r0
0
r0
0
r0
1
1
0
0
1
0
0
1
1
r0
3
1
1
1
0
0
0
0
i3
r1
i3
r1
r1
i3
r1
i3
r1
i3
r1
i3
r1
i3
r1
i3
r1
r1
1
n3
n3
1
1
1
1
1
2
0
0
0
0
0
1
1
i2
r0
i2
r0
r0
i2
r0
i2
r0
i2
r0
i2
r0
i2
r0
i2
r0
r0
1
n2
n2
0
1
0
1
1
1
0
0
1
r1
r1
r1
r1
i1
q1
i1
q1
q1
i1
q1
i1
q1
i1
q1
i1
q1
i1
q1
i1
q1
r1
r1
n1
n1
r1
r1
r1
r1
1
0
0
1
0
r0
r0
r0
r0
i0
q0
i0
q0
q0
i0
q0
i0
q0
i0
q0
i0
q0
i0
q0
i0
q0
r0
r0
n0
n0
r0
r0
r0
r0
1
YH
YL
F
SPH, r
SPL, r
r, SPH
r, SPL
r, i
r, q
r, i
r, q
r, q
r, i
r, q
r, i
r, q
r, i
r, q
r, i
r, q
r, i
r, q
r, i
r, q
r
r
Mn
Mn
MX, r
MY, r
MX, r
MY, r
r
POP
LD
ADD
ADC
SUB
SBC
AND
OR
XOR
CP
FAN
RLC
RRC
INC
DEC
ACPX
ACPY
SCPX
SCPY
NOT
Stack
operation
instructions
Arithmetic
instructions
Classification Operand
IDZC
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5
5
5
5
5
5
5
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
5
7
7
7
7
7
7
7
Clock
Operation Code Flag
YH
←
M(SP), SP
←
SP+1
YL
←
M(SP), SP
←
SP+1
F
←
M(SP), SP
←
SP+1
SPH
←
r
SPL
←
r
r
←
SPH
r
←
SPL
r
←
r+i3~i0
r
←
r+q
r
←
r+i3~i0+C
r
←
r+q+C
r
←
r-q
r
←
r-i3~i0-C
r
←
r-q-C
r
←
rΛi3~i0
r
←
rΛq
r
←
rVi3~i0
r
←
rVq
r
←
r∀i3~i0
r
←
r∀q
r-i3~i0
r-q
rΛi3~i0
rΛq
d3
←
d2, d2
←
d1, d1
←
d0, d0
←
C, C
←
d3
d3
←
C, d2
←
d3, d1
←
d2, d0
←
d1, C
←
d0
M(n3~n0)
←
M(n3~n0)+1
M(n3~n0)
←
M(n3~n0)-1
M(X)
←
M(X)+r+C, X
←
X+1
M(Y)
←
M(Y)+r+C, Y
←
Y+1
M(X)
←
M(X)-r-C, X
←
X+1
M(Y)
←
M(Y)-r-C, Y
←
Y+1
r
←
r
Mne-
monic
Operation
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★
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