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Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
MSB LSB
MSB LSB
C –
Z –
D –
I –
C –
Z –
D –
I –
44 EPSON S1C6200/6200A CORE CPU MANUAL
3 INSTRUCTION SET
JP C,s Jump if carry flag is set
JP C,s
PCB ← NBP, PCP ← NPP, PCS ← s
7 to s0 if C = 1
0010s
7 s6 s5 s4 s3 s2 s1 s0 200H to 2FFH
I
5
Not affected
Not affected
Not affected
Not affected
Jumps to the destination address specified by the 8-bit operand when the carry
flag is set.
ADD A,8 PSET 06H JP C,10H
PCB 0 0 0 0
NBP 0 0 0 0
PCP 0010 0010 0010 0110
NPP 0001 0001 0110 0110
PCS 0011 1100 0011 1101 0011 1110 0001 0000
A register 1000 0000 0000 0000
C flag 0 1 1 1
JP NC,s Jump if not carry
JP NC,s
PCB ← NBP, PCP ← NPP, PCS ← s
7 to s0 if C = 0
0011s
7 s6 s5 s4 s3 s2 s1 s0 300H to 3FFH
I
5
Not affected
Not affected
Not affected
Not affected
Jumps to the destination address specified by the 8-bit operand when the carry
flag is not set.
PSET 11H JP NC,10H
PCB 0 0 1
NBP 0 1 1
PCP 1001 1001 0001
NPP 0001 0001 0001
PCS 1000 1111 1001 0000 0001 0000
C flag 0 0 0