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Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
MSB LSB
MSB LSB
C –
Z –
D –
I –
C –
Z –
D –
I –
S1C6200/6200A CORE CPU MANUAL EPSON 81
3 INSTRUCTION SET
SZF Set zero flag
SZF
Z ← 1
11110100 0 010 F42H
VI
7
Not affected
Set
Not affected
Not affected
Sets the Z (zero) flag.
SZF
Z flag 0 1
XOR r,i Exclusive-OR immediate data i with r-register
XOR r,i
r ← r ∀ i
3 to i0
110100r1 r0 i3 i2 i1 i0 D00H to D3FH
II
7
Not affected
Set if the result is zero; otherwise, reset.
Not affected
Not affected
Performs an exclusive-OR operation between immediate data i and the contents
of the r-register. The result is stored in the r-register.
XOR A,12 XOR MX,1
A register 0110 1010 1010
Memory (MX) 0001 0001 0000
Z flag 0 0 1