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Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
MSB LSB
MSB LSB
C –
Z –
D –
I –
C –
Z –
D –
I –
S1C6200/6200A CORE CPU MANUAL EPSON 63
3 INSTRUCTION SET
OR r,q Logical OR q-register with r-register
OR r,q
r ← r ∨ q
10101101 r1 r0 q1 q0 AD0H to ADFH
IV
7
Not affected
Set if the result is zero; otherwise, reset.
Not affected
Not affected
Performs a logical OR operation between the contents of the q-register and the
contents of the r-register. The result is stored in the r-register.
OR MY,0 OR A,0CH
A register 0011 0011 1111
Memory (MY) 0000 0000 0000
Z flag 0 1 0
POP F Pop stack data into flags
POP F
F ← M(SP), SP ← SP + 1
11111101 1 010 FDAH
VI
5
Set or Reset by M(SP) data
Set or Reset by M(SP) data
Set or Reset by M(SP) data
Set or Reset by M(SP) data
Replaces the flags (F) with the contents of the data memory location addressed by
the stack pointer. SP is incremented by 1.
POP F
SP C0 C1
Memory (C0H) 1001 1001
Flags (I,D,Z,C) 0001 1001
2
3
2
2
2
1
2
0
M(SP) =
flag
flag
flag
flag
C
Z
D
I