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CHAPTER 2 HARDWARE CONFIGRATION
2.9 Time-base Timer
• This timer has a 20-bit binary counter and uses a clock pulse with 1/2 oscillation of
the source clock.
• Four interval times can be selected.
• This function cannot be used in the STOP state.
■
Block Diagram
*TBTC is a clock pulse with 1/2 oscillation of the souce clock.
■
Register List
The time-base timer has time-base timer control register (TBCR).
1
/2
TBTC*
21-bit counter
TBC0
TBC1
TBR
TBIE
TBIF
MPX
Interrupt request
IRQ7
1
/2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Address: 000AH
TBCR
8 bit
R/W Time-base timer control register