EM78P221/2N
8-Bit Microcontroller with OTP ROM
Product Specification (V1.0) 10.19.2007 • 35
(This specification is subject to change without further notice)
6.5.2 The T and P Status under Status Register
A reset condition is initiated by one of the following events:
1. Power-on reset
2. /RESET pin input "low"
3. WDT time-out (if enabled)
The values of T and P as listed in the table below, are used to check how the processor
wakes up.
Reset Type T P
Power-on 1 1
/RESET during Operating mode *P *P
/RESET wake-up during Sleep mode 1 0
LVR during Operating mode, *P *P
LVR wake-up during SLEEP mode 1 0
WDT during Operating mode 0 *P
WDT wake-up during Sleep mode 0 0
Wake-up on pin change during Sleep mode 1 0
* P: Previous status before reset
The following shows the events that may affect the status of T and P.
Event T P
Power-on 1 1
WDTC instruction 1 1
WDT time-out 0 *P
SLEP instruction 1 0
Wake-up on pin changed during Sleep mode 1 0
* P: Previous value before reset
