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82540EP — Networking Silicon
24 Datasheet
Figure 4. PCI Bus Interface Input Timing Measurement Conditions
V
TH
V
TL
V
TEST
PCI_CLK
T
SU
V
TEST
Input V
MAX
V
TEST
V
TL
V
TH
Input
Valid
T
H
Table 16. PCI Bus Interface Timing Measurement Conditions
Symbol Parameter
PCI 66 MHz
3.3 v
Unit
VTH Input measurement test voltage (high) 0.6*VCC V
VTL Input measurement test voltage (low) 0.2*VCC V
VTEST Output measurement test voltage 0.4*VCC V
Input signal slew rate 1.5 V/ns
Figure 5. TVAL (max) Rising Edge Test Load
10 pF
25Ω
Pin
Test
Poin
t
1/2 inch max.