Intel 82550 Switch User Manual


 
10/100 Mbps Ethernet Controller Family Open Source Software Developer Manual 131
Physical Layer Interface
To detect the correct technology, the two register fields are ANDed together to obtain the highest
common denominator. This value is used to map into a priority resolution table used by the MAC
driver to select the appropriate technology. The auto-negotiation process occurs in the following
steps:
1. Receive 3 consecutive, matching code words.
2. Set acknowledge bit in transmit code word.
3. Receive 3 consecutive, matching code words with acknowledge bit set.
4. Transmit 6 to 8 more code words with acknowledge bit set.
5. Use priority table to determine operating mode.
6. FLP received from link partner is recorded in MDI register.
7.4.2 Parallel Detection
The key to auto-negotiation’s interoperation with installed legacy LANs is the Parallel Detection
function. Parallel Detection can be used to determine what the line speed is if the link partner does
not support an N-Way (the FLP exchange is not supported) repeater or switch. Parallel Detection
works by passing the signals present on the receiver to the 100BASE-TX and 100BASE-T4 link
monitor functions. If one link monitor function indicates a valid link, then it connects that
technology to the media.
The 82555 PHY and the 8255x (excluding the 82557) PHY modules support N-Way and Parallel
Detection (in the event that their link partner does not respond to FLPs).
Table 64. Technology Ability Field Bit Assignments
Bit Setting Technology
0 10BASE-T
1 10BASE-T Full Duplex
2 100BASE-TX
3 100BASE-TX Full Duplex
4 100BASE-T4
5Reserved
6Reserved
7Reserved
Table 65. Technology Priority
Priority Technology
1 100BASE-TX Full Duplex
2 100BASE-T4
3 100BASE-TX
4 10BASE-T Full Duplex
5 10BASE-T