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© National Instruments Corporation I-7 PCI-1200 User Manual
pins, 3-18 to 3-19
timing specifications, 3-27 to 3-30
digital I/O signal connections,
3-16 to 3-18
logical inputs and outputs,
3-17 to 3-18
Port C pin connections, 3-18
I/O connector
exceeding maximum ratings
(caution), 3-1
pin assignments (figure), 3-2
power connections, 3-18
signal descriptions (table), 3-3 to 3-4
single-channel data acquisition, 4-9
single-ended connections
floating signal sources (RSE
configuration), 3-13
ground-referenced signal sources (NRSE
configuration), 3-13 to 3-14
purpose and use, 3-12
when to use, 3-12
software programming choices
National Instruments application
software, 1-2 to 1-3
NI-DAQ driver software, 1-3 to 1-4
register-level programming, 1-4
specifications
analog input, A-1 to A-6
analog output, A-6 to A-7
bus interface, A-9
digital I/O, A-7 to A-8
environment, A-9
physical, A-9
power requirements, A-9
timing I/O, A-8 to A-9
square wave generation, 3-23
STB* signal (table), 3-27
system noise, A-5
T
technical support, B-1 to B-2
theory of operation
analog input, 4-5 to 4-11
circuitry, 4-6 to 4-7
illustration, 4-5
DAQ rates, 4-10 to 4-11
analog output, 4-11 to 4-12
circuitry, 4-11 to 4-12
illustration, 4-11
DAC timing, 4-12
block diagram of PCI-1200, 4-1
digital I/O, 4-12 to 4-13
circuitry (figure), 4-12
functional overview, 4-1 to 4-2
PCI interface circuitry, 4-2 to 4-3
block diagram, 4-2
timing, 4-3 to 4-5
circuitry (figure), 4-4
time-lapse measurement, 3-24
timing circuitry
illustration, 4-4
theory of operation, 4-3 to 4-5
timing I/O specifications, A-8 to A-9
timing signal connections
DAQ timing connections, 3-19 to 3-23
EXTCONV* signal, 3-19 to 3-21
EXTCONV* signal timing
(figure), 3-19
EXTTRIG signal, 3-19 to 3-20
EXTUPDATE* signal, 3-22 to 3-23
interval scanning, 3-21
pins, 3-18 to 3-19
posttrigger and pretrigger modes,
3-19 to 3-20
posttrigger timing (figure), 3-20
pretrigger timing (figure), 3-21