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2.1.4 Parallel Interface Control
The parallel data input from the host to the interfaced LSI is latched to its internal register at
the falling edge of the STROBE-N signal.
At the same time, the LSI sets the BUSY signal to the high level to inform the host that the
data is being processed, and outputs the RXD signal to inform the MPU of data reception. The
data is read upon receiving the RD-N signal from the MPU.
When the data processing ends, the BUSY signal is set to off and the ACK-N signal in sent
to request the next data. When reception is impossible because the buffer is full, the BUSY signal
is sent to request stopping of data transmission.
A/D bus
MPU LSI
NBSY
ACK
NSTB
RXD
P16 NRXD
Receive Data
CN1
BUSY
ACK-N
STB-N
Data
1 to 8
STROBE
BUSY
ACK
RXD
2~8µs
500ns max.