Renesas M16C/6NN Computer Hardware User Manual


 
Rev.1.02 Jul 01, 2005 page 170 of 314
REJ09B0126-0102
M16C/6N Group (M16C/6NL, M16C/6NN) 14. Serial I/O
Under development
This document is under development and its contents are subject to change.
14.1.6.2 Format
When direct format, set the PRY bit in the U2MR register to 1, the UFORM bit in the U2C0 register to
0 and the U2LCH bit in the U2C1 register to 0.
When inverse format, set the PRY bit to 0, UFORM bit to 1 and U2LCH bit to 1.
Figure 14.35 shows the SIM interface format.
Figure 14.35 SIM Interface Format
P : Even parity
D0 D1 D2 D3 D4 D5 D6 D7 P
Transfer
clock
TXD2
TXD2
D7 D6 D5 D4 D3 D2 D1 D0 P
Transfer
clock
"H"
"L"
"H"
"L"
P : Odd parity
"H"
"L"
"H"
"L"
(1) Direct format
(2) Inverse format