Renesas M16C/6NN Computer Hardware User Manual


 
Rev.1.02 Jul 01, 2005 page 208 of 314
REJ09B0126-0102
M16C/6N Group (M16C/6NL, M16C/6NN) 18. CAN Module
Under development
This document is under development and its contents are subject to change.
Figure 18.11 C0CONR Register
b7 b6 b5 b4 b3 b2 b1 b0
0 : One time sampling
1 : Three times sampling
0 0 0 0 : Divide-by-1 of fCAN
0 0 0 1 : Divide-by-2 of fCAN
0 0 1 0 : Divide-by-3 of fCAN
1 1 1 0 : Divide-by-15 of fCAN
1 1 1 1 : Divide-by-16 of fCAN
(1)
.....
0 0 0 : 1Tq
0 0 1 : 2Tq
0 1 0 : 2Tq
1 1 0 : 7Tq
1 1 1 : 8Tq
(b15) (b8)
b7 b6 b5 b4 b3 b2 b1 b0
RW
RW
RW
RW
Phase Buffer
Segment 1
Control Bits
Phase Buffer
Segment 2
Control Bits
Resynchronization
Jump Width
Control Bits
.....
CAN0 Configuration Register
b3 b2 b1 b0
b7 b6 b5
b2 b1b0
b5 b4 b3
b7 b6
NOTE:
1. fCAN serves for the CAN clock. The period is decided by configuration of the CCLKi bit (i = 0 to 2) in the CCLKR register.
Sampling Control
Bit
Prescaler Division
Ratio Select Bits
Propagation Time
Segment Control
Bits
RW
RW
RW
.....
.....
0 0 0 : Do not set a value
0 0 1 : 2Tq
0 1 0 : 3Tq
1 1 0 : 7Tq
1 1 1 : 8Tq
0 0 0 : Do not set a value
0 0 1 : 2Tq
0 1 0 : 3Tq
1 1 0 : 7Tq
1 1 1 : 8Tq
0 0 : 1Tq
0 1 : 2Tq
1 0 : 3Tq
1 1 : 4Tq
BRP
SAM
PTS
PBS1
PBS2
SJW
C0CONR
Indeterminate
021Ah
Symbol
Address After Reset
C0CONR
Indeterminate
021Bh
Symbol
Address After Reset
RWFunctionBit Symbol Bit Name
FunctionBit Symbol Bit Name