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Sundance Technology ST201 PRELIMINARY draft 2
MAXLAT
Class....................PCI Configuration Registers, Configuration
Base Address ......PCI device configuration header start
Address Offset.....0x3f
Access Mode.......Read Only
Width ...................8 bits
BIT BIT NAME BIT DESCRIPTION
7..0 MaxLat MaxLat specifies, in 250 ns increments, how often the ST201 requires
bus access while operating as a bus master. The value for MaxLat is
stored in the ConfigParm word in EEPROM. Assumes the PCI system
allows 64-byte maximum bursts with full duplex operation, the ST201-
based 100 Mbps systems return the value 10 in this field, implying a
latency tolerance of 2.5us, according to the calculation:
64 bytes/(12.5 MB/s x 2) = 2.56us
The result is rounded to 2.5 us, which is 250 ns * 10