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Sundance Technology ST201 PRELIMINARY draft 2
CONFIGPARM
Class....................EEPROM Data Format
Base Address ......0x00, address written to EepromCtrl register
Address Offset.....0x00
Access Mode.......Read Only
Width ...................16 bits
This is loaded into the ST201 and controls various hardware functions related to PCI bus operation.
ConfigParm has a default value of 2ab0h, but is normally overwritten by the value in EEPROM. The default
values specify:
FastBackToBack = 0
Lower1Meg = 0
DisableMemBase = 0
D3ColdPme = 0
D1Support = 1
D2Support = 1
PmeEn = 0
MinGnt = 0101b (2.5 us)
MaxLat = 00101b (2.5 us).
BIT BIT NAME BIT DESCRIPTION
0 FastBackToBack Determines the value for the FastBackToBack bit in the ConfigStatus
register.
1 Lower1Meg Provides the value for MemMapType[0] in the MemBaseAddress regis-
ter.
2 DisableMemBase When set, disables the MemBaseAddr register. This bit causes Mem-
BaseAddr to read back as zeroes, appearing as if it is not implemented
by the adapter.
3 D3ColdPme Provides the value returned in bit 15 of the PowerMgmtCap register.
This bit, when set, indicates that the adapter is capable of signaling
wake from the D3cold state.
4 D1Support Provides the value returned in D1Support and also bit 12 in the Power-
MgmtCap register.
5 D2Support Provides the value returned in D2Support and also bit 13 in the Power-
MgmtCap register.
6 PmeEn When this bit is set, the ST201 is allowed to report wake events on the
PMEN signal.
10..7 MinGnt Determines the value returned in bits [4..1] of the MinGnt register.
15..11 MaxLat Determines the value returned in bits [5..1] of the MaxLat register.