Texas Instruments TMS320 DSP Computer Hardware User Manual


 
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2.3.1MemorySpaces
2.3.2ScratchversusPersistent
DataMemory
Whiletheamountofon-chipdatamemorymaybeadequateforeachalgorithminisolation,theincreased
numberofMIPSavailableonmodernDSPsencouragessystemstoperformmultiplealgorithms
concurrentlywithasinglechip.Thus,somemechanismmustbeprovidedtoefficientlysharethisprecious
resourceamongalgorithmcomponentsfromoneormorethirdparties.
InanidealDSP,therewouldbeanunlimitedamountofon-chipmemoryandalgorithmswouldsimply
alwaysusethismemory.Inpractice,however,theamountofon-chipmemoryisverylimitedandthereare
eventwocommontypesofon-chipmemorywithverydifferentperformancecharacteristics:dual-access
memorywhichallowssimultaneousreadandwriteoperationsinasingleinstructioncycle,andsingle
accessmemorythatonlyallowsasingleaccessperinstructioncycle.
Becauseofthesepracticalconsiderations,mostDSPalgorithmsaredesignedtooperatewitha
combinationofon-chipandexternalmemory.Thisworkswellwhenthereissufficienton-chipmemoryfor
allthealgorithmsthatneedtooperateconcurrently;thesystemdevelopersimplydedicatesportionsof
on-chipmemorytoeachalgorithm.Itisimportant,however,thatnoalgorithmassumespecificregionof
on-chipmemoryorcontainany"hardCoded"addresses;otherwisethesystemdeveloperwillnotbeable
tooptimallyallocatetheon-chipmemoryamongallalgorithms.
Rule3
Algorithmdatareferencesmustbefullyrelocatable(subjecttoalignmentrequirements).Thatis,there
mustbeno“hard-coded”datamemorylocations.
Notethatalgorithmscandirectlyaccessdatacontainedinastaticdatastructurelocatedbythelinker.This
ruleonlyrequiresthatallsuchreferencesbedonesymbolically;i.e.,viaarelocatablelabelratherthana
fixednumericaladdress.
Insystemswherethesetofalgorithmsisnotknowninadvanceorwhenthereisinsufficienton-chip
memoryfortheworst-caseworkingsetofalgorithms,moresophisticatedmanagementofthisprecious
resourceisrequired.Inparticular,weneedtodescribehowtheon-chipmemorycanbesharedatrun-time
amonganarbitrarynumberofalgorithms.
Inthissection,wedevelopageneralmodelforsharingregionsofmemoryamongalgorithms.Thismodel
isusedtosharetheon-chipmemoryofaDSP,forexample.Thismodelisessentiallyageneralizationof
thetechniquecommonlyusedbycompilerstoshareCPUregistersamongfunctions.Compilersoften
partitiontheCPUregistersintotwogroups:"scratch"and"preserve."Scratchregisterscanbefreelyused
byafunctionwithouthavingtopreservetheirvalueuponreturnfromthefunction.Preserveregisters,on
theotherhand,mustbesavedpriortobeingmodifiedandrestoredpriortoreturningfromthefunction.By
partitioningtheregistersetinthisway,significantoptimizationsarepossible;functionsdonotneedto
saveandrestorescratchregisters,andcallersdonotneedtosavepreserveregisterspriortocallinga
functionandrestorethemafterthereturn.
Considertheprogramexecutiontraceofanapplicationthatcallstwodistinctfunctions,saya()andb().
Voidmain()
{
.../*usescratchregistersr1andr2*/
/*callfunction
a()*/
a(){
.../*usescratchregistersr0,r1,andr2*/
}
/*callfunctionb()
*/
b(){
.../*usescratchregistersr0andr1*/
}
}
20GeneralProgrammingGuidelinesSPRU352GJune2005RevisedFebruary2007
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