Filter
Top Products
www.ti.com
A.5DMAGuidelines
DMAGuidelines
Guideline12—AllC6xalgorithmsshouldbesuppliedinbothlittle-andbig-endianformats.(See
Section5.3.1)
Guideline13—Onprocessorsthatsupportlargeprogrammodelcompilations,aversionofthealgorithm
shouldbesuppliedthataccessesallcorerun-timesupportfunctionsasnearfunctionsandall
algorithmsasfarfunctions(mixedmodel).(SeeSection5.4.2)
Guideline14—AllC55xalgorithmsshouldnotassumeanyspecificstackconfigurationandshouldwork
underallthethreestackmodes.(SeeSection5.5.1)
DMAGuideline1—ThedatatransfershouldcompletebeforetheCPUoperationsexecutinginparallel
(DMAguideline).(SeeSection6.6)
DMAGuideline2—Allalgorithmsshouldminimizechannel(re)configurationoverheadbyrequestinga
dedicatedlogicalDMAchannelforeachdistincttypeofDMAtransferitissues,andavoidcalling
ACPY2configureandpreferringthenewfastconfigurationAPIswherepossible.(SeeSection6.12)
DMAGuideline3—Toensurecorrectness,AllC6000algorithmsthatimplementIDMA2needtobe
suppliedwiththeinternalmemorytheyrequestfromtheclientapplciationusingalgAlloc().(See
Section6.13.1)
DMAGuideline4—Tofacilitatehighperformance,C55xalgorithmsshouldrequestDMAtransferswith
sourceanddestinationsalignedon32-bitbyteaddresses.(SeeSection6.14.1)
DMAGuideline5—C55xalgorithmsshouldminimizechannelconfigurationoverheadbyrequestinga
separatelogicalchannelforeachdifferenttransfertype.TheyshouldalsocallACPY2_configure
whenthesourceordestinationaddressesbelonginadifferenttypeofmemory(SARAM,DARAM,
External)ascomparedwiththatofthemostrecenttransfer.(SeeSection6.14.2)
SPRU352G–June2005–RevisedFebruary2007RulesandGuidelines79
SubmitDocumentationFeedback