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4.3InterruptLatency
4.4ExecutionTime
4.4.1MIPSIsNotEnough
InterruptLatency
Code
CodeSectionsSizeAlign
a.obj(.text)7680
b.obj(.text)12532
InmostDSPsystems,algorithmsarestartedbythearrivalofdataandthearrivalofdataissignaledbyan
interrupt.Itisveryimportant,therefore,thatinterruptsoccurinastimelyafashionaspossible.In
particular,algorithmsshouldminimizethetimethatinterruptsaredisabled.Ideally,algorithmswouldnever
disableinterrupts.InsomeDSParchitectures,however,zerooverheadloopsimplicitlydisableinterrupts
and,consequently,optimalalgorithmefficiencyoftenrequiressomeinterruptlatency.
Guideline9
Interruptlatencyshouldneverexceed10µs.
Rule23
Allalgorithmsmustcharacterizetheirworst-caseinterruptlatencyforeveryoperation.
Allalgorithmsmustcharacterizetheirinterruptlatencybyfillingoutatablesuchasthatshownbelow.The
interruptlatencymustbeexpressedinunitsofinstructioncycles.Notethattheentryinthistableisnot
requiredtobeaconstant;itmaybefunctionofthealgorithm'sinstancecreationparameters.Eachrowof
thetablecorrespondstoamethodofthealgorithm.
OperationWorst-CaseLatency(InstructionCycles)
process()300
Inpractice,theinterruptlatencymayalsodependonthetypeofmemoryallocatedtoanalgorithm
instance.Sincethisrelationshipcanbeextremelycomplex,interruptlatencyshouldbemeasuredfora
singlefixedconfiguration.Thus,thisnumbermustbethelatencyimposedbyanalgorithminstanceusing
thesamememoryconfigurationusedtospecifyworst-caseMIPSandmemoryrequirements.
Inthissection,weexaminetheexecutiontimeinformationthatshouldbeprovidedbyalgorithm
componentstoenablesystemintegratorstoassemblecombinationsofalgorithmsintoreliableproducts.
Wefirstpointoutthechallengesandthendescribeasimplemodelthat,whilenotperfect,willsignificantly
improveourabilitytointegratealgorithmsintoasystem.
ItisimportanttorealizethatasimpleMIPScalculationisfarfromsufficientwhencombiningmultiple
algorithms.Itispossible,forexample,fortwoalgorithmstobe"unschedulable"eventhoughonly84%of
theavailableMIPSarerequired.Intheworstcase,itispossibleforasetofalgorithmstobe
unschedulablealthoughonly70%oftheavailableMIPSarerequired!
Suppose,forexample,thatasystemconsistsoftwotasksAandBwithperiodsof2msand3ms
respectively.SupposethattaskArequires1msoftheCPUtocompleteitsprocessingandtaskBalso
requires1msoftheCPU.ThetotalpercentageoftheCPUrequiredbythesetwotasksisapproximately
83.3%;50%fortaskAplus33.3%fortaskB.
SPRU352G–June2005–RevisedFebruary2007AlgorithmPerformanceCharacterization41
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