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5.7.5InterruptLatency
TMS320C28xRulesandGuidelines
ST1FieldNameUseType
ARPAuxiliaryregisterpointerScratch(local)
XFXFpinstatusReadOnly(global)
M0M1MAPM0andM1mappingmodebitReadOnly(global)
OBJMODEObjectcompatibilitymodeReadOnly(global)
AMODEAddressmodebitReadOnly(global)
IDLESTATIDLEstatusbitReadOnly(glogal)
EALLOWEmulationaccessenablebitReadOnly(global)
LOOPLoopinstructionstatusbitScratch(local)
SPAStackpointeralignmentbitInit(local)
VMAPVectormapbitReadOnly(global)
PAGE0PAGE0addressingmodeconfigurationReadOnly(global)
DBGMDebugenablemaskbitReadOnly(global)
INTMInterruptmodePreserve(global)
TheTMS320C28xCPUhasonlyonenon-interruptibleloopinstruction,namelyRPT.Oncestarted,the
RPTinstructionblocksinterruptsuntiltheentirenumberofrepeatsarecompleted.Thus,thelengthof
theseloopscanhavesignificanteffectontheworstcaseinterruptlatencyofanalgorithm
60DSP-SpecificGuidelinesSPRU352G–June2005–RevisedFebruary2007
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