Xilinx SP605 Computer Hardware User Manual


 
SP605 Hardware User Guide www.xilinx.com 45
UG526 (v1.1.1) February 1, 2010
Detailed Description
User SMA GPIO
The SP605 includes an pair of SMA connectors for GPIO as described in Figure 1-19 and
Table 1-27.
X-Ref Target - Figure 1-19
Figure 1-19: User SMA GPIO
Table 1-27: User SMA Connections
U1 FPGA Pin Schematic Net Name GPIO SMA Pin
A3 USER_SMA_GPIO_N J39.1
B3 USER_SMA_GPIO_P J40.1
GND1
GND2
GND3
GND4
GND5
GND6
GND7
SIG
GND1
GND2
GND3
GND4
GND5
GND6
GND7
SIG
USER_SMA_GPIO_P
USER_SMA_GPIO_N
1
8
7
6
5
4
3
2
J40
32K10K-400E3
1
8
7
6
5
4
3
2
32K10K-400E3
J39
UG526_19 _092409