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6 www.xilinx.com SP605 Hardware User Guide
UG526 (v1.1.1) February 1, 2010
Preface: About This Guide
This guide describes the clocking resources available in all Spartan-6 devices,
including the DCMs and PLLs.
• Spartan-6 FPGA Block RAM Resources User Guide
This guide describes the Spartan-6 device block RAM capabilities.
• Spartan-6 FPGA GTP Transceivers User Guide
This guide describes the GTP transceivers available in the Spartan-6 LXT FPGAs.
• Spartan-6 FPGA DSP48A1 Slice User Guide
This guide describes the architecture of the DSP48A1 slice in Spartan-6 FPGAs and
provides configuration examples.
• Spartan-6 FPGA Memory Controller User Guide
This guide describes the Spartan-6 FPGA memory controller block, a dedicated
embedded multi-port memory controller that greatly simplifies interfacing
Spartan-6 FPGAs to the most popular memory standards.
• Spartan-6 FPGA PCB Designer’s Guide
This guide provides information on PCB design for Spartan-6 devices, with a focus on
strategies for making design decisions at the PCB and interface level.
Additional Support Resources
To search the database of silicon and software questions and answers or to create a
technical support case in WebCase, see the Xilinx website at:
http://www.xilinx.com/support
.