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Chapter 1:
Introduction
1-4 HSIM-W87 User’s Guide
1.3 DATA FLOW IN THE HSIM-W87
The T3 port receives the DS3 data through the coaxial interface. A T3
framer/Multiplexer strips off the T3 framing and provides 28 individual
T1 data streams. The T1 data streams are then terminated by T1 framers,
which provide an HDLC bit stream to the HDLC controller. The
controller receives data packets from each of the bit streams and places
them in a memory subsystem. An onboard CPU examines the packet and
notifies the host of its arrival. Finally, a Cabletron proprietary ASIC
transfers the data to the host platform.
This process is followed in reverse when a packet is transmitted from the
host platform out the T3 port. The host platform notifies the HSIM-W87
when a packet is coming and transfers the packet to the memory. The
HDLC format is applied to the data; then the data is framed to a T1
format, and passed to the framer/ Multiplexer. The T1 data is multiplexed
with other T1 streams and is transmitted out through the T3 interface.
1.4 FEATURES
• Data Transfer Rates of 45 Mbps in full duplex, when running all 28
T1s carrying continuous data traffic of 128-byte packets or larger.
• High-level Data Link Control (HDLC) protocol
• T1 Inverse Multiplexing (IMUX)
• WAN IP Priority Queuing functionality
• DS1 Alarm Thresholds
• SNMP support
• DS1 and DS3 MIB Support
• LANVIEW LEDs
1.4.1 Connectivity
The HSIM-W87 module supports WAN technology using a DS3
interface, and supports 28 live full duplex T1 connections. The
HSIM-W87 channelizes the T3 down to the DS1 level. The HSIM-W87
has an integrated M13 MUX.