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VIPER Technical Manual Detailed hardware description
© 2007 Eurotech Ltd Issue E 23
GPIO
No
AF
Signal name Dir Active Sleep Function See section…
14 0 FLASH_ STATUS Input NA Input Bootloader FLASH
Status,
Ready / nBusy
49HInterrupt assignments
(page
305H30) and 306HFLASH
memory/silicon disk
(page
307H27)
15 2 CS1 Output Low Hi-Z
Chip Select 1
308HVIPER address map
(page
309H19)
16 2 PWM0 Output See
inverter
datasheet
0 Backlight Brightness
On/Off or variable if
PWM
310HLCD backlight brightness
control
(page 311H37)
17 2 PWM1 Output NA 0
STN Bias
312HSTN BIAS voltage
(page
313H38)
18 1 ARDY Input Low Input 10/100 Ethernet PHY
Ready
-
19 0 PSU_nCS_LD Output Low 0 Microprocessor Core
Voltage DAC Chip
Select
314HProcessor power
management
(page 315H81)
20 0 OUT0
21 0 OUT1
22 0 OUT2
23 0 OUT3
24 0 OUT4
25 0 OUT5
26 0 OUT6
27 0 OUT7
Output
User
Config
0
User Config
316HGeneral purpose I/O
(page
317H57)
28 1 AC97_BITCLK Input Input BITCLK
29 1 AC97_IN Input NA Input SDATA_IN0
30 2 AC97_OUT Output NA 0 SDATA_OUT
31 2 AC97_SYNC Output 0 SYNC
-
32 0 CF_DETECT Input Input
CF Detection
50HInterrupt assignments
(page
318H30) and
319HCompactFLASH (page 320H28)
33 2 CPLDCS Output Low Hi-Z
Chip Select 5
321HVIPER address map,
(page
322H19)
continued
…
VL
VL
VL
VL