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ZEUS Technical Manual Appendix H - Acronyms and abbreviations
© 2007 Eurotech Ltd Issue D 130
Appendix H - Acronyms and abbreviations
Amp Amplifier
BTUART Bluetooth Universal Asynchronous Receiver / Transmitter
CCCR Core Clock Configuration Register
CODEC Coder/Decoder
COM Communication Port
CPLD Complex Programmable Logic Device
CPU Central Processing Unit (PXA270)
CMOS Complementary Metal Oxide Semiconductor
DMA Direct Memory Access
DUART Dual Universal Asynchronous Receiver / Transmitter
EEPROM Electrically Erasable and Programmable Read-Only Memory
EMC Electromagnetic Compatibility
EPIC Embedded Platform for Industrial Computing
EPROM Erasable and Programmable Read-Only Memory
FFUART Full Function Universal Asynchronous Receiver / Transmitter
FIFO First-In First-Out
Flash A non-volatile memory that is preserved even if the power is lost
FPIF Flat Panel Interface
GPIO General Purpose Input/Output
I²C (=IIC) Intra Integrated Circuit bus
IEEE Institute of Electrical and Electronics Engineers
IO Input/Output
ISA Industry Standard Architecture, Bus in the IBM-PC
JTAG Joint Test Action Group of IEEE
LED Light Emitting Diode
LCD Liquid Crystal Display
LSB Least Significant Bit
LVDS Low Voltage Differential Signalling
MOSFET Metal-Oxide Semiconductor Field-Effect Transistor
NA Not Applicable
NC No Connect
NU Not Used
OS Operating System
PC/104 Offers full architecture, hardware and software compatibility with the
PC ISA bus, but in ultra-compact 96mm x 91mm (3.775" x 3.550")
stackable modules
PCB Printed Circuit Board
PoE Power over Ethernet
PROM Programmable Read-Only Memory
PWM Pulse-Width Modulation
RAM Random Access Memory
RTC Real Time Clock
RX Receive
SBC Single Board Computer