Fujitsu Semiconductor Computer Hardware User Manual


 
85
Main Addressing Modes
(can be used by transfer and arithmetic instructions)
Bit addressing
Direct bit: I/O area (2 Kbits) + area inside DPR page (2 Kbits)
Any bit within 64 Kbytes may be specified.
Indirect addressing
@RWi, @RWi+, @RWi+disp16, @RLi+disp8, @RWj+disp8 (i = 0 to 3), (j = 0 to 7)
@RW0+RW7
@RW1+RW7
@PC+disp16
@A
Direct addressing
R0 to R7, RW0 to RW7, RL0 to RL3
dir, addr16, io, addr24
Super Accumulator
32-bit accumulator using AH:AL (16 bits:16 bits) as a pair.
Data precision verification function
Data keep function (available for data types of 16-bit word length and less)
00F8
F8
FFF8
F8
Zero extension
Sign extension
For example, MOV instruction
MOVX instruction
AH AL
Xa
ab
aa+b
MOV A,#b
ADDW A
16-bit Proprietary F
2
MC-16L Family
Addressing and Super-accumulator
F
2
MC-16L Family