Fujitsu Semiconductor Computer Hardware User Manual


 
98
Main Addressing Modes
(Can be used by transfer and arithmetic instructions)
Bit addressing
Direct bit: I/O area (2Kbits) + area inside DPR page (2Kbits)
Any bit within 64 Kbytes may be specified.
Indirect addressing
@RWi, @RWi+, @RWi+disp16, @RLi+disp8, @RWj+disp8 (i = 0 to 3), (j = 0 to 7)
@RW0+RW7
@RW1+RW7
@PC+disp16
@A
Direct addressing
R0 to R7, RW0 to RW7, RL0 to RL3
dir, addr16, io
Super Accumulator
32-bit accumulator using AH:AL (16 bits:16 bits) as a pair.
Data precision verification function
Data keep function (available for data types of 16-bit word length and less)
Fields for Product Expansion
Applicable to the following fields:
Digital AV system (Serial communication enhancement, large size)
Mobile equipment system (Low-power dissipation)
File-related system (Signal processing enhancement)
Network system (Telecommunication macro enhancement)
00F8
FFF8
For example, a MOV instruction
MOVX instruction
F8
F8
Zero extension
Sign extension
X a
a b
a a+b
AH AL
MOV A,#b
ADDW A
16-bit Proprietary F
2
MC-16LX Family
Addressing, Super-accumulator, and
Fields for Product Expanision