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FUNCTIONAL DESCRIPTION
F. LINE STATUS REGISTER
+------+
D7 | FFRX |----- Error in FIFO RCVR (FIFO only)
+------+
D6 | TEMT |----- Transmitter empty
+------+
D5 | THRE |----- Transmitter holding register empty
+------+
D4 | BI |----- Break interrupt
+------+
D3 | FE |----- Framing error
+------+
D2 | PE |----- Parity error
+------+
D1 | OE |----- Overrun error
+------+
D0 | DR |----- Data ready
+------+
Figure 12. Line status register bit definitions.
FFRX - FIFO Receiver Error:
Always logic 0 in character mode.
FIFO mode:
Indicates one or more parity errors, framing
errors, or break indications in the receiver
FIFO. FFRX is reset by reading the line status
register.
TEMT - Transmitter Empty:
Indicates the transmitter holding register (or
FIFO) and the transmitter shift register are
empty and are ready to receive new data. TEMT is
reset by writing a character to the transmitter
holding register.
THRE - Transmitter Holding Register Empty:
Indicates the transmitter holding register (or
FIFO) is empty and it is ready to accept new
data. THRE is reset by writing data to the
transmitter holding register (or FIFO).
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