IBM P5 520 Projector User Manual


 
30 IBM System p5 520 and 520Q Technical Overview and Introduction
2.2.4 Available processor speeds
Table 2-1 lists the available processor capacities and speeds for the p5-520 and p5-520Q
systems.
Table 2-1 p5-520 and p5-520Q available processor capacities and speeds
To determine the processor characteristics, use one of the following commands:
lsattr -El procX
In this command, X is the number of the processor. For example, proc0 is the first
processor in the system. The output from the command is similar to the following output
(False, as used in this output, signifies that the value cannot be changed through an AIX
5L command interface):
frequency 1498500000 Processor Speed False
smt_enabled true Processor SMT enabled False
smt_threads 2 Processor SMT threads False
state enable Processor state False
type powerPC_POWER5 Processor type False
pmcycles -m
The pmcycles command (AIX 5L) uses the performance monitor cycle counter and the
processor real-time clock to measure the actual processor clock speed in MHz. The
following output is from a 4-core p5-520Q system running at 1.5 GHz with simultaneous
multithreading enabled:
Cpu 0 runs at 1498 MHz
Cpu 1 runs at 1498 MHz
Cpu 2 runs at 1498 MHz
Cpu 3 runs at 1498 MHz
2.3 Memory subsystem
The p5-520 and p5-520Q servers offer pluggable DDR2 DIMMs for memory. DDR2 DIMMs
have a double rate compared with DDR DIMMs (DDR DIMMs have double rate bits
compared with SDRM), so that enables up to four times the performance of traditional
SDRAM. The system planar provides eight slots for up to eight pluggable DDR2 DIMMs.
The minimum memory for a p5-520 or p5-520Q server is 1.0 GB (2 x 512 MB) and 32 GB is
the maximum installable memory option. Figure 2-7 shows the memory slot and location
codes. All memory is accessed by two Synchronous Memory Interface (SMI)-II chips that are
located between the memory and the processor. The SMI-II supports multiple data flow
modes.
p5-520 @
1.65 GHz
p5-520 @
1.9 GHz
p5-520 @
2.1 GHz
p5-520Q @
1.5 GHz
p5-520Q @
1.65 GHz
1-core Yes No Yes No No
2-core Yes Yes Yes No No
4-core No No No Yes Yes
Note: The pmcycles command is part of the bos.pmapi fileset. This component must be
installed before using the lslpp -l bos.pmapi command.