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Datasheet 37
Power Management
There is also a concept of Execution Allowed (EA). When EA status is 0, the cores in a
socket are in C3 or a deeper state; a socket initiates a request to enter a coordinated
package C-state. The coordination is across all sockets and the PCH.
Table 4-9 shows an example of a dual-core processor package C-state resolution.
Figure 4-3 summarizes package C-state transitions with package C2 as the interim
between PC0 and PC1 prior to PC3 and PC6.
Note:
1. The package C-state will be C1E if all actives cores have resolved a core C1 state or higher.
4.2.5.1 Package C0 State
The normal operating state for the processor. The processor remains in the normal
state when at least one of its cores is in the C0 or C1 state or when the platform has
not granted permission to the processor to go into a low-power state. Individual cores
may be in lower power idle states while the package is in C0 state.
Table 4-9. Coordination of Core Power States at the Package Level
Package C-State
Core 1
C0 C1 C3 C6
Core 0
C0
C0 C0 C0 C0
C1
C0 C1
1
C1
1
C1
1
C3
C0 C1
1
C3 C3
C6
C0 C1
1
C3 C6
Figure 4-3. Package C-State Entry and Exit