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DS33Z41 Quad IMUX Ethernet Mapper
139 of 167
Register Name:
SU.TxBdFrmCtr
Register Description:
MAC All Frames Aborted Counter
Register Address:
0338h (indirect)
0338h:
Bit # 31 30 29 28 27 26 25 24
Name
TXFRMBD31 TXFRMBD30 TXFRMBD29 TXFRMBD28 TXFRMBD27 TXFRMBD26 TXFRMBD25 TXFRMBD24
Default 0 0 0 0 0 0 0 0
0339h:
Bit # 23 22 21 20 19 18 17 16
Name
TXFRMBD23 TXFRMBD22 TXFRMBD21 TXFRMBD20 TXFRMBD19 TXFRMBD18 TXFRMBD17 TXFRMBD16
Default 0 0 0 0 0 0 0 0
033Ah:
Bit # 15 14 13 12 11 10 09 08
Name
TXFRMBD15 TXFRMBD14 TXFRMBD13 TXFRMBD12 TXFRMBD11 TXFRMBD10 TXFRMBD9 TXFRMBD8
Default 0 0 0 0 0 0 0 0
033Bh:
Bit # 07 06 05 04 03 02 01 00
Name
TXFRMBD7 TXFRMBD6 TXFRMBD5 TXFRMBD4 TXFRMBD3 TXFRMBD2 TXFRMBD1 TXFRMBD0
Default 0 0 0 0 0 0 0 0
Bits 31 to 0: All Frames Aborted Counter (TXFRMBD31 to TXFRMBD0). 32-bit value indicating the number of
frames aborted due to any reason. Each time a frame is aborted, this counter is incremented by 1. This counter
resets only upon device reset, does not saturate, and rolls over to zero upon reaching the maximum value. The
user should ensure that the measurement period is less than the minimum length of time required for the counter
to increment 2^32-1 times at the maximum frame rate. The user should store the value from the beginning of the
measurement period for later calculations, and take into account the possibility of a rollover occurring.