Renesas HD49335NP Power Supply User Manual


 
HD49335NP/HNP
Rev.1.0, Feb.12.2004, page 27 of 29
Example of Recommended External Circuit
Slave mode
Pin 57(Test1 = Low)
31
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
33
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
16
24 23 22 21 20 19 18 1725262728293032
50 57 58 59 60 61 62 63 6456555453525149
HD49335
1µ
1µ 0.147/6 47/6
1000p 100p
+
XV4
CH1
CH2
CH3
CH4
XSUB
SUB_SW/ADCK_in
SUB_PD
STROB/Vgate
DV
SS
3
AV
SS
ADC_in
BIAS
VRB
VRT
VRM
HD_in
CLK_in
DV
SS
3
DV
DD
2
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
DV
SS
1,2
ID
XV2
XV1
DV
DD
3
DV
DD
4
1/4clk_o
H2A
DV
SS
4
DV
SS
4
1/2clk_o
H1A
DV
DD
4
DV
DD
3
RG
Reset
BLKC
CDS_in
AV
DD
BLKFB
BLKSH
AV
SS
Test2
Test1
DLL_C
DV
DD
1
MON
41pin_cont
CS
Sdata
XV3 VD_in
AV
DD
SCK
0.147/6
0.1
0.1
0.1
0.1
3.0V
Reset(Normally Hi)
Reset(Normally Hi)
to CCD
+
+
0.1
33k
to CCD
to CCD
ID pulse
ID pulse
to V.Baff
47µ
47µ
47µ
Master mode
Pin 57(Test1 = Hi)
31
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
33
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
16
24 23 22 21 20 19 18 1725262728293032
50 57 58 59 60 61 62 63 6456555453525149
HD49335
1µ
1µ 0.147/6 47/6
1000p 100p
+
XV4
CH1
CH2
CH3
CH4
XSUB
SUB_SW/ADCK_in
SUB_PD
STROB/Vgate
DV
SS
3
AV
SS
ADC_in
BIAS
VRB
VRT
VRM
HD_in
CLK_in
DV
SS
3
DV
DD
2
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
DV
SS
1,2
ID
XV2
XV1
DV
DD
3
DV
DD
4
1/4clk_o
H2A
DV
SS
4
DV
SS
4
1/2clk_o
H1A
DV
DD
4
DV
DD
3
RG
Reset
BLKC
CDS_in
AV
DD
BLKFB
BLKSH
AV
SS
Test2
Test1
DLL_C
DV
DD
1
MON
41pin_cont
CS
Sdata
Unit: R:
C: F
XV3 VD_in
AV
DD
SCK
0.147/6
0.1
0.1
0.1
0.1
CCD signal input
CCD signal input
3.0V
to CCD
+
+
0.1
33k
61pin = Low: Pin 41 is STROB output
Pin 39 is SUB_SW output
61pin = Hi: Pin 41 is Vgate output
Pin 39 is Hiz
61pin = Low: Pin 41 is STROB output
Pin 39 is SUB_SW output
61pin = Hi: Pin 41 is Vgate output
Pin 39 is Hiz
to V.Baff
47µ
47µ
47µ
Pin 56 = Low: TESTIN mode. Please do not use.
Low
Hi
Pin 57
Slave mode
Master mode
Mode
CLK, HD, VD input from SSG.
HD, VD output
Specification
Serial data input
Serial data input
from
Pulse generator
from
Pulse generator
to
Camera
signal
processor
to
Camera
signal
processor
to
Camera
signal
processor