Renesas M37760T-RPD-E Switch User Manual


 
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Note on Software Breaks:
Software breaks generate break interruptions by forcibly inserting a BRK instruction "00h" instead
of an instruction code. Therefore, when referencing the result of a trace in bus mode, "00h" is
displayed for the instruction fetch address where a software break is set.
IMPORTANT
Note on Monitor Work Area of the Emulator:
Please note that this emulator uses the following areas of the MCU access space as monitor work
areas. For details, refer to "5.2 Memory Mapping" (page 45).
(1) User stack: Part of the user stack area from the address indicated by the stack pointer
toward the lower address direction. (Normally 9 bytes, Max. 14 bytes)
(2) Monitor work area: Part of an area in bank 00 (any 6 bytes)
Part of the vector area in bank 00 (Min. 2 bytes, Max. 4 bytes)
(3) Debug bank: Bank FF
Note on Watch Point:
When you set a watch point over the SFR area with this product and the emulator debugger, the
following should be noted.
(1) Make sure the address specified for a watch point and the addresses set for the real-time RAM
monitor (you can check by the RRAM command of the M3T-PD77) do not overlap one
another.
When the address specified for a watch point and the addresses set for the real-time RAM
monitor overlap one another and the SFR area is readout, data is not displayed properly.
The initial setting of the real-time RAM monitor is 0000H to 03FFH.
Example: When you want to set a watch point at 0000H, change the addresses for the real-
time RAM monitor to 0010H to 040FH.
Note on Event Breaks:
•With this product and the emulator debugger, you can not use data readout from the SFR area as
a condition for event breaks.
Note on Reading Out the MCU Internal Resources:
•Reading out the SFR area with this product and the emulator debugger will be resulted in the
following. (The content of this area is not displayed correctly while data in the MCU is not
affected.)
(1) Result of real-time trace
Data of the cycle when the SFR area is readout is not displayed properly.
(2) Real-time RAM monitor
Data of the cycle when the SFR area is readout is not displayed properly.