Texas Instruments SPRU938B Network Card User Manual


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2PeripheralArchitecture
2.1ClockControl
VLYNQ
CLKDIR=0
DMxxxdevice
VLYNQ_CLK
VLYNQ
CLKDIR=0
VLYNQdevice
VLYNQ
CLKDIR=1
DMxxxdevice
VLYNQ_CLK
VLYNQ
CLKDIR=1
VLYNQdevice
VLYNQ
internal
sysclk
Don’t
care
PeripheralArchitecture
ThissectiondiscussesthearchitectureandbasicfunctionsoftheVLYNQperipheral.
Themodule'sserialclockdirectionandfrequencyaresoftwareconfigurablethroughtheCLKDIRand
CLKDIVbitsintheVLYNQcontrolregister(CTRL).TheVLYNQserialclockcanbesourcedfromthe
internalsystemclock(CLKDIR=1)orbyanexternalclocksource(CLKDIR=0)foritsserialoperations.
TheCLKDIVbitcandividetheserialclock(1/1-1/8)downwhentheinternalclockisselectedasthe
source.TheserialclockisnotaffectedbytheCLKDIVbitvalues,iftheserialclockisexternallysourced.
TheresetvalueoftheCLKDIRbitis0(externalclocksource).
TheexternalclocksourceisshowninFigure2.TheinternalclocksourceisshowninFigure3.
Figure2.ExternalClockBlockDiagram
Figure3.InternalClockBlockDiagram
VLYNQPort 10SPRU938B–September2007
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