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1VLYNQSignalDescriptions...............................................................................................11
2AddressTranslationExample(SingleMappedRegion)..............................................................17
3AddressTranslationExample(SingleMappedRegion)..............................................................18
4VLYNQRegisterAddressSpace.........................................................................................24
5VLYNQPortControllerRegisters........................................................................................24
6RevisionRegister(REVID)FieldDescriptions.........................................................................25
7ControlRegister(CTRL)FieldDescriptions............................................................................26
8StatusRegister(STAT)FieldDescriptions.............................................................................28
9InterruptPriorityVectorStatus/ClearRegister(INTPRI)FieldDescriptions........................................30
10InterruptStatus/ClearRegister(INTSTATCLR)FieldDescriptions..................................................30
11InterruptPending/SetRegister(INTPENDSET)FieldDescriptions.................................................31
12InterruptPointerRegister(INTPTR)FieldDescriptions...............................................................31
13AddressMapRegister(XAM)FieldDescriptions......................................................................32
14ReceiveAddressMapSize1Register(RAMS1)FieldDescriptions................................................33
15ReceiveAddressMapOffset1Register(RAMO1)FieldDescriptions..............................................33
16ReceiveAddressMapSize2Register(RAMS2)FieldDescriptions................................................34
17ReceiveAddressMapOffset2Register(RAMO2)FieldDescriptions..............................................34
18ReceiveAddressMapSize3Register(RAMS3)FieldDescriptions................................................35
19ReceiveAddressMapOffset3Register(RAMO3)FieldDescriptions..............................................35
20ReceiveAddressMapSize4Register(RAMS4)FieldDescriptions................................................36
21ReceiveAddressMapOffset4Register(RAMO4)FieldDescriptions..............................................36
22ChipVersionRegister(CHIPVER)FieldDescriptions.................................................................37
23AutoNegotiationRegister(AUTNGO)FieldDescriptions............................................................37
24VLYNQPortRemoteControllerRegisters..............................................................................38
A-1Special8b/10bCodeGroups.............................................................................................39
A-2SupportedOrderedSets..................................................................................................39
A-3PacketFormat(10-bitSymbolRepresentation)Description..........................................................41
B-1ScalingFactors.............................................................................................................45
B-2ExpectedThroughput(VLYNQInterfaceRunningat76.5MHZand99MHZ)....................................45
B-3RelativePerformancewithVariousLatencies..........................................................................46
C-1DocumentRevisionHistory...............................................................................................47
6ListofTablesSPRU938B–September2007
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