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2.13PowerManagement
2.14EndiannessConsiderations
2.15EmulationConsiderations
PeripheralArchitecture
TheVLYNQmodulecanbeplacedinreduced-powermodestoconservepowerduringperiodsoflow
activity.ThepowermanagementoftheVLYNQmoduleiscontrolledbytheprocessorPowerandSleep
Controller(PSC).ThePSCactsasamastercontrollerforpowermanagementforalloftheperipheralson
thedevice.FordetailedinformationonpowermanagementproceduresusingthePSC,seethe
TMS320DM643xDMPDSPSubsystemReferenceGuide(SPRU978).
ThepowerconservationmodesthatareavailableviathePSCare:
•Idle/Disabledstate:Idle/disabledstatestopstheclocksfromgoingtotheperipheralandpreventsallof
theregisteraccesses.Afterre-enablingtheperipheralfromitsidlestate,allregisterspriortosettingin
thedisabledstatearerestoredanddatatransmissionproceeds.Re-initializationisnotrequired.
•Synchronizedreset:Thesynchronizedresetstateissimilartothepower-onreset(POR)state.When
theprocessoristurnedon,resettotheperipheralisasserted,thenclockstotheperipheralaregated.
Registersresettotheirdefaultvalues.Whenpowering-upafterasynchronizedreset,alloftheVLYNQ
moduleregistersmustbereconfiguredandthelinkmustbere-establishedbeforedatatransmission.
Iftheserialclockisinternallysourced,youcanusetheCLKDIVbitintheVLYNQcontrolregister(CTRL)
todividetheserialclockdown.Thissavesnormalmodeoperationpowerconsumption(attheexpenseof
reducedperformance).
Additionally,themoduleprovidesthecapabilityofauto-idlingtheserialclockdomain(disabletheVLYNQ
CLK)whentheserialclockissourcedfromtheDM643xdeviceandtheVLYNQSCRUNpinisconnected
totheremotedevice.Thisallowspowersavingswhenthereisnoactivityontheserialinterface.
Note:Thereisnosupportforexternalwake-upfortheVLYNQmoduleontheDM643xdevice.If
theVLYNQmoduleontheDM643xdevicehasbeendisabledviathePSC,theneventhough
serialactivityrequestscanbeindicatedfromtheremoteVLYNQdeviceviatheVLYNQ
SCRUNpin,itdoesnotallowtheserialclock(VLYNQCLK)tobesourceduntiltheVLYNQ
moduleisre-enabledviathePSC.
Thiscanbeconfiguredbyenablingthepowermanagementenable(PMEN)bitintheVLYNQcontrol
registers(CTRL,0=disable,1=enable).ThisbitshouldonlybesetiftheSCRUNpinisconnectedto
theremoteVLYNQdevice.
TheSCRUNpinisabi-directionalpinwhichisdrivenlowwheneverthereisserialactivityonthelocalor
remoteVLYNQinterface.
TherearenoendiannessconsiderationsfortheVLYNQperipheral.
Duringdebug,theCPUmaybehaltedforsinglestepping,benchmarking,profiling,orotherdebuguses
usingtheemulator.VLYNQdoesnotsupportemulationhalts/suspendoperation.VLYNQoperations
continueduringemulationhalt/suspend.
SPRU938B–September2007VLYNQPort23
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