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3.3StatusRegister(STAT)
VLYNQPortRegisters
Thestatusregister(STAT)isusedtodetectconditionsthatmaybeofinteresttothesystemdesigner.The
STATisshowninFigure11anddescribedinTable8.
Figure11.StatusRegister(STAT)
3128272423201915
ReservedSWIDTHINSWIDTHOUTReserved
R-0R-0R-0R-0
1412111098
RXCURRENTSAMPLERTMIFLOWOFLOWRERROR
R-0R-1R-0R-0W1C-0
76543210
LERRORNFEMPTY3NFEMPTY2NFEMPTY1NFEMPTY0SPENDMPENDLINK
W1C-0R-0R-0R-0R-0R-0R-0R-0
LEGEND:R/W=Read/Write;R=Readonly;W1C=Write1toclearbit;-n=valueafterreset;x=resetvalueisindeterminate
Table8.StatusRegister(STAT)FieldDescriptions
BitFieldValueDescription
31-28Reserved0Reserved.Alwaysreadas0.Writeshavenoeffect.
27-24SWIDTHINSizeoftheinboundserialdata.Indicatesthenumberofreceivepinsthatarebeingusedto
0-Fh
establishtheserialinterface.
0Nopinsused
1h1RXpinused
2h2RXpinsused
3h3RXpinsused
4h4RXpinsused
5h-FhReserved
23-20SWIDTHOUT0-FhSizeoftheoutboundserialdata.Indicatesthenumberoftransmitpinsthatarebeingused
toestablishtheserialinterface.
0Nopinsused
1h1TXpinused
2h2TXpinsused
3h3TXpinsused
4h4TXpinsused
5h-FhReserved
19-15Reserved0Reserved.Alwaysreadas0.Writeshavenoeffect.
14-12RXCURRENTSAMPLE0-FhCurrentRTMsample.IndicatesthecurrentclocksamplevalueusedbyRTM.
11RTM1RTMenable.Alwaysreadas1.IndicatesthattheVLYNQmoduleontheDM643xDMSoC
hasthereceivetimingmanager(RTM).
10IFLOWInboundflowcontrol.
0Freetotransmit.
Indicatesthataflowcontrolenablerequesthasbeenreceivedandhasstalledtransmituntil
1
aflowcontroldisablerequestisreceived.
9OFLOWOutboundflowcontrol.IndicatesthestatusofthetwoinboundFIFOs(FIFO1orFIFO2).
0Indicatesthattheinternalflowcontrolthresholdisnotyetreached.
Indicatesthattheinternalflowcontrolthresholdhasbeenreached(FIFO1orFIFO2isfull)
1
andaflowcontrolenablerequesthasbeensenttotheremotedevice.
28VLYNQPortSPRU938B–September2007
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