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Appendices Apx. C Pin Assignments
C-16 EQUIUM M40/M45/Sarellite M40/M45 Maintenance Manual
AE10 DGND I M1 DGND I
AE11 /+VCC_CORE O M2 /H_DBSY# O
AE12 DGND - M21 DGND -
AE13 /+VCC_CORE O M22 /+VCCP O
AE14 DGND I M23 /H_D#(24) I
AE15 /+VCC_CORE O M24 DGND O
AE16 DGND - M25 /H_D#(28) -
AE17 /+VCC_CORE O M26 /H_D#(19) O
AE18 DGND I M3 /H_TRDY# I
AE19 /+VCC_CORE O M4 DGND O
AE2 /H_A#(27) - M5 DGND -
AE20 DGND O M6 /+VCCP O
AE21 /H_D#(59) I N2 /H_ADS# I
AE22 /H_D#(55) O N21 /+VCCP O
AE23 DGND O N22 DGND O
Table C-22 CPU Socket (471-Pin) (6/9)
AE24 /H_DSTBN#3
-
N23 DGND
-
AE25 /H_DSTBP#3
I/O
N24 /H_D#(27)
I/O
AE26 DGND
O
N25 /H_D#(30)
O
AE3 DGND
-
N26 DGND
-
AE4 /H_A#(22)
-
N3 DGND
-
AE5 /H_ADSTB#1
-
N4 DGND
-
AE6 DGND
O
N5 /+VCCP
O
AE7 /N$4289
I
N6 DGND
I
AE8 DGND
O
P1 /H_REQ#(3)
O
AE9 /+VCC_CORE
-
P2 DGND
-
AF1 /H_A#(31) O P21 DGND O
AF10 /+VCC_CORE I P22 /+VCCP I