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Appendices Apx. C Pin Assignments
C-18 EQUIUM M40/M45/Sarellite M40/M45 Maintenance Manual
B14 /CLK_CPU_BCLK#
O
T26 DGND
O
B15 /CLK_CPU_BCLK
-
T3 DGND
-
B16 DGND O T4 /H_A#(9) O
B17
DGND
I T5 DGND I
B18 /H_THERMDA O T6 /+VCCP O
B19 DGND O U1 /H_A#(13) O
B20 /H_D#(7) - U2 DGND -
B21 /H_D#(3) I/O U21 /+VCCP I/O
B22 DGND O U22 DGND O
B23 /H_D#(13) - U23 /H_D#(35) -
B24 /H_D#(9) O U24 DGND O
B25 DGND I U25 /H_D#(43) I
B26 /H_D#(5) O U26 /H_D#(41) O
B3 DGND - U3 /H_ADSTB#0 -
B4 /H_SMI# - U4 /H_A#(4) -
B5 /H_INIT# O U5 /+VCC_CORE O
B6 DGND I U6 DGND I
B7 /H_DPSLP# O V1 DGND O
B8 /H_BPM1# - V2 /H_A#(7) -
B9 DGND O V21 DGND O
C1 DGND I V22 /+VCC_CORE I
C10 DGND O V23 /H_D#(36) O
C11 /H_TMS O V24 /H_D#(42) O
Table C-22 CPU Socket (471-Pin) (8/9)
C12 DGND
-
V25 DGND
-
C13 DGND
I/O
V26 /H_D#(44)
I/O
C15 DGND
O
V3 /H_A#(5)
O