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Appendices Apx. C Pin Assignments
EQUIUM M40/M45/Sarellite M40/M45 Maintenance Manual C-17
AF11 DGND O P23 /+VCCP O
AF12 /+VCC_CORE O P24 DGND O
AF13 DGND - P25
DGND
-
AF14 /+VCC_CORE I/O P26
DGND
I/O
AF15 DGND O P3 /H_REQ#(1) O
AF16 /+VCC_CORE - P4 /H_A#(3) -
AF17 DGND O P5 DGND O
AF18 /+VCC_CORE I P6 /+VCCP I
AF19 DGND O R1 DGND O
AF2 DGND - R2 /H_REQ#(0) -
AF20 /H_D#(58) - R21 /+VCCP -
AF21 DGND O R22 DGND O
AF22 /H_D#(62) I R23 /H_D#(39) I
AF23 /H_D#(56) O R24 /H_D#(37) O
AF24 DGND - R25 DGND -
AF25 /H_D#(61) O R26 /H_D#(38) O
AF26 /H_D#(63) I R3 /H_A#(6) I
AF3 /H_A#(29) O R4 DGND O
AF4 /H_A#(17) O R5 /+VCCP O
Table C-22 CPU Socket (471-Pin) (7/9)
AF5 DGND
-
R6 DGND
-
AF6 DGND
I/O
T1 /H_REQ#(4)
I/O
AF8 /+VCC_CORE
O
T2 /H_REQ#(2)
O
AF9 DGND
-
T21 DGND
-
B10 /H_PREQ#
-
T22 /+VCCP
-
B11 /H_CPURST#
-
T23 DGND
-
B12 DGND
O
T24 /H_DINV#2
O
B13 DGND
I
T25 /H_D#(34)
I