Toshiba MK4006GAH Computer Drive User Manual


 
Toshiba Corporation Digital Media Network Company
Page 104 of 153
© 2003, Copyright TOSHIBA Corporation All Rights Reserved
bit 3 (off-line read scanning implemented bit)
If this bit is cleared to zero, the device does not support off-line read scanning. If this bit is set to one, the
device supports off-line read scanning. This bit is set to 1.
bit 4 (self-test implemented bit)
If this bit is cleared to zero, the device does not implement the Short and Extended self-test routines. If this
bit is set to one, the device implements the Short and Extended self-test routines. This bit is set to 1.
bits 5 (reserved).
This bit is set to 0.
bits 6 (Selective self-test implemented bit)
If this bit is cleared to zero, the device does not implement the Selective self-test routine. If this bit is set to
one, the device implements the Selective self-test routine. This bit is set to 1.
bits 7 (reserved).
This bit is set to 0.
BYTE 368-369: SMART capability
bit 0 (power mode SMART data saving capabilities bit)
bit0 = 1 SMART data is saved before Power save mode changes.
bit0 = 0 SMART data is NOT saved before Power save mode changes.
This bit is set to 1
bit 1 (SMART data autosave after event capability bit)
This bit is fixed to 1
bit 2-15 Reserved
BYTE 370 Error logging capability
BYTE 371 Self-test Failure Checkpoint
This byte reports the checkpoint when previos self-test failed.
BYTE 372-373: Self-test routine recommended polling time
The self-test routine recommended polling time is equal to the number of minutes that is the minimum
recommended time before which the host should first poll for test completion status. Actual test time could
be several times this value. Polling before this time could extend the self-test execution time or abort the
test depending on the state of bit 2 of the off-line data capability bits.
BYTE 374-510: Reserved
BYTE 511: Data structure checksum
Checksum of the first 511 byte