Programming Release Notes
5.25 HP MACRO for OpenVMS
Table 5–1 (Cont.) Macro-32 New Built-ins
Built-in Operands
1
Description
Supported
on
IA64_PADD2 <WQ,RQ,RQ> Generate Parallel Add instruction, two
byte form, with the first argument as the
destination and the next two arguments
as the source operands.
Integrity
servers
IA64_PADD2_SSS <WQ,RQ,RQ> Generate Parallel Add instruction, two
byte form, with the first argument as the
destination and the next two arguments
as the source operands. Result and both
source operands are treated as signed.
Integrity
servers
IA64_PADD2_UUS <WQ,RQ,RQ> Generate Parallel Add instruction, two
byte form, with the first argument as the
destination and the next two arguments
as the source operands. Result and first
source operand are treated as unsigned
and the second source operand is treated
as signed.
Integrity
servers
IA64_PADD2_UUU <WQ,RQ,RQ> Generate Parallel Add instruction, two
byte form, with the first argument as the
destination and the next two arguments
as the source operands. Result and both
source operands are treated as unsigned.
Integrity
servers
IA64_PADD4 <WQ,RQ,RQ> Generate Parallel Add instruction, four
byte form, with the first argument as the
destination and the next two arguments
as the source operands.
Integrity
servers
IA64_MUX1 <WQ,RQ,RQ> Generate ’mux1’ instruction with the
first argument as the destination and
the second argument as the source
operand. The third argument specifies
the permutation to be performed.
2
Integrity
servers
EVAX_S4ADDQ <WQ,RQ,RQ> Generates Alpha scaled quadword add
instruction.
Alpha and
Integrity
servers
IA64_LFETCH_NT1,
IA64_LFETCH_NT2,
IA64_LFETCH_NTA,
IA64_LFETCH_EXCL_NT1,
IA64_LFETCH_EXCL_NT2,
IA64_LFETCH_EXCL_NTA
<RQ,RQ> These enhanced prefetch built-ins
provide a method for specifying non-
default cache locality hints (that is,
".nt1",".nt2",and ".nta"). The first
operand is the address to prefetch
and the second operand is for either
the reg-base-update-form or the imm-
baseupdate-form; if the operand is the
literal zero, the no-baseupdate- form will
be used.
Integrity
servers
1
The built-in requires the operands, where WQ - Write Quadword, PQ - Read Quadword, AB - Address of Byte.
2
A literal specifying the permutation has to be used as the third argument. The mapping of the permutations to the
literals are as follows:
• BRCST 0
• MIX 8
• SHUF 9
•ALT10
• REV 11
(continued on next page)
5–20 Programming Release Notes
