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Chapter 4 System Support
Compaq Deskpro EXS and Workstation 300 Personal Computers
Featuring the Intel Pentium 4 Processor
First Edition - December 2000
4-16
8259 Mode
In 8259-Mode, interrupts IRQ0-IRQ15 are handled in the conventional (AT-system) method using
logic that is the equivalent of two 8259 interrupt controllers. Table 4-7 lists the standard source
configuration for maskable interrupts and their priorities in 8259 mode. If more than one interrupt
is pending, the highest priority (lowest number) is processed first.
Table 4-7. Maskable Interrupt Priorities and Assignments
Table 4-7.
Maskable Interrupt Priorities and Assignments
Priority Signal Label Source (Typical)
1 IRQ0 Interval timer 1, counter 0
2 IRQ1 Keyboard
3 IRQ8- Real-time clock
4 IRQ9 Microtower, game/MIDI port; desktop or minitower, unused.
5 IRQ10 Unused
6 IRQ11 Unused
7 IRQ12 Mouse
8 IRQ13 Coprocessor (math)
9 IRQ14 IDE primary I/F
10 IRQ15 IDE secondary I/F
11 IRQ3 Serial port (COM2)
12 IRQ4 Serial port (COM1)
13 IRQ5 Unused
14 IRQ6 Diskette drive controller
15 IRQ7 Parallel port (LPT1)
-- IRQ2 NOT AVAILABLE (Cascade from interrupt controller 2)
APIC Mode
The Advanced Programmable Interrupt Controller (APIC) mode enhances interrupt-processing
performance with the following advantages:
♦ Eliminating the processor’s interrupt acknowledge cycle by using a separate APIC bus.
♦ Programmable interrupt priority.
♦ Additional interrupts (total of 24).
Eight PCI interrupts are available in APIC mode. The PCI interrupts are evenly distributed to
minimize latency and are hard-wired as follows:
ICH2
IRQ Cntlr.
PCI
Slot 1
PCI
Slot 2
PCI
Slot 3
PCI
Slot 4
PCI
Slot 5
AGP
Slot
USB
Cntlr. #1
USB
Cntlr. #2
Audio
Cntlr.
INTA- INTA- INTD- INTC- INTB- INTD- -- -- -- --
INTB- ------------ -- -- --
INTC- INTB- INTA- INTD- INTC- INTA- INTA- -- -- --
INTD- ----------INTB-INTD--- --
INTE- ------------ -- --INTA-
INTF- INTC- INTB- INTA- INTD- INTB- -- -- -- --
INTG- INTD- INTC- INTB- INTA- INTC- -- -- -- --
INTH- ------------ --INTH---
Wired
to