![](http://pdfasset.owneriq.net/a/30/a30c0cbf-e529-4021-94a0-61f8a80f679a/a30c0cbf-e529-4021-94a0-61f8a80f679a-bg17.png)
PRELIMINARY 23
8XC251SA/SB/SP/SQ HIGH-PERFORMANCE CHMOS MICROCONTROLLER
Figure 8. External Bus Cycle: Data Read (Nonpage Mode)
XTAL1
ALE
T
LHLL
†
A7:0
D7:0
RD#/PSEN#
P0
P2/A16/A17
T
RHDX
T
RHLH2
T
RLRH
†
T
LLRL
†
T
AVLL
†
T
LLAX
T
RLDV
†
T
AVRL
†
T
AVDV1
†
T
AVDV2
†
T
OSC
A4210-03
T
LHAX
†
Data In
†
The value of this parameter depends on wait states. See the table of AC characteristics.
A15:8/A16/A17
T
RHDZ2
T
RLAZ