Renesas M16C/6NL Computer Hardware User Manual


 
Rev.1.02 Jul 01, 2005 page 143 of 314
REJ09B0126-0102
M16C/6N Group (M16C/6NL, M16C/6NN) 14. Serial I/O
Under development
This document is under development and its contents are subject to change.
Table 14.6 Registers to Be Used and Settings in UART Mode
Register Bit Function
UiTB 0 to 8 Set transmission data
(1)
UiRB 0 to 8 Reception data can be read
(1)
OER,FER,PER,SUM Error flag
UiBRG 0 to 7 Set a transfer rate
UiMR SMD2 to SMD0 Set these bits to 100b when transfer data is 7-bit long
Set these bits to 101b when transfer data is 8-bit long
Set these bits to 110b when transfer data is 9-bit long
CKDIR Select the internal clock or external clock
STPS Select the stop bit
PRY, PRYE Select whether parity is included and whether odd or even
IOPOL Select the TXD/RXD input/output polarity
UiC0 CLK0, CLK1 Select the count source for the UiBRG register
CRS
_______ _______
Select CTS or RTS to use
TXEPT Transmit register empty flag
CRD
_______ _______
Enable or disable the CTS or RTS function
NCH Select TXDi pin output mode
CKPOL Set to 0
UFORM LSB first or MSB first can be selected when transfer data is 8-bit long. Set this
bit to 0 when transfer data is 7- or 9-bit long.
UiC1 TE Set this bit to 1 to enable transmission
TI Transmit buffer empty flag
RE Set this bit to 1 to enable reception
RI Reception complete flag
U2IRS
(2)
Select the source of UART2 transmit interrupt
U2RRM
(2)
Set to 0
UiLCH Set this bit to 1 to use inverted data logic
UiERE Set to 0
UiSMR 0 to 7 Set to 0
UiSMR2 0 to 7 Set to 0
UiSMR3 0 to 7 Set to 0
UiSMR4 0 to 7 Set to 0
UCON U0IRS, U1IRS Select the source of UART0/UART1 transmit interrupt
U0RRM, U1RRM Set to 0
CLKMD0 Invalid because the CLKMD1 bit = 0
CLKMD1 Set to 0
RCSP
_________
Set this bit to 1 to accept as input the UART0 CTS0 signal from the P6_4 pin
7 Set to 0
i = 0 to 2
NOTES:
1. The bits used for transmit/receive data are as follows:
Bit 0 to bit 6 when transfer data is 7-bit long
Bit 0 to bit 7 when transfer data is 8-bit long
Bit 0 to bit 8 when transfer data is 9-bit long.
2. Set bit 4 to bit 5 in the U0C1 and U1C1 registers to 0. The U0IRS, U1IRS, U0RRM and U1RRM bits are included
in the UCON register.