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Rev.1.02 Jul 01, 2005 page 28 of 314
REJ09B0126-0102
M16C/6N Group (M16C/6NL, M16C/6NN) 6. Processor Mode
Under development
This document is under development and its contents are subject to change.
6. Processor Mode
Three processor mode is available single-chip mode only.
Figures 6.1 and 6.2 show the processor mode related registers. Figure 6.3 shows the memory map.
Figure 6.1 PM0 Register
Processor Mode Bit
Reserved Bit
Software Reset Bit
PM03
PM01
PM00
-
(b2)
RW
RW
RW
RW
RW
0 0 : Single-chip mode
0 1 :
1 0 : Do not set a value
1 1 :
b1 b0
Set to "0"
Setting this bit to "1" resets the
microcomputer. When read, its
content is "0".
.
NOTE:
1. Write to this register after setting the PRC1 bit in the PRCR register to "1" (write enable).
Symbol Address After Reset
00hPM0 0004h
Processor Mode Register 0
(1)
Bit Name Function
Bit Symbol
b7 b6 b5 b4 b3 b2 b1 b0
Reserved Bit
-
(b7-b4)
RWSet to "0"
0000 000