Renesas M16C/6NL Computer Hardware User Manual


 
Rev.1.02 Jul 01, 2005 page 291 of 314
REJ09B0126-0102
M16C/6N Group (M16C/6NL, M16C/6NN) 22. Usage Precaution
Under development
This document is under development and its contents are subject to change.
22.9.2 Timer B
22.9.2.1 Timer B (Timer Mode)
The timer remains idle after reset. Set the mode, count source, counter value, etc. using the TBiMR
(i = 0 to 5) register and TBi register before setting the TBiS bit
(1)
in the TABSR or the TBSR register to
1 (count starts).
Always make sure the TBiMR register is modified while the TBiS bit remains 0 (count stops) regardless
whether after reset or not.
NOTE:
1. The TB0S to TB2S bits are the bits 5 to 7 in the TABSR register, the TB3S to TB5S bits are the bits
5 to 7 in the TBSR register.
A value of a counter, while counting, can be read in the TBi register at any time. FFFFh is read while
reloading. Setting value is read between setting values in the TBi register at count stop and starting a
counter.
22.9.2.2 Timer B (Event Counter Mode)
The timer remains idle after reset. Set the mode, count source, counter value, etc. using the TBiMR
(i = 0 to 5) register and TBi register before setting the TBiS bit in the TABSR or the TBSR register to 1
(count starts).
Always make sure the TBiMR register is modified while the TBiS bit remains 0 (count stops) regardless
whether after reset or not.
The counter value can be read out on-the-fly at any time by reading the TBi register. However, if this
register is read at the same time the counter is reloaded, the read value is always FFFFh. If the TBi
register is read after setting a value in it while not counting but before the counter starts counting, the
read value is the one that has been set in the register.