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Option Gated Sampling Recording modes
(c) Spectrum GmbH 75
Option Gated Sampling
The option Gated Sampling allows the data acquisition controlled by an external gate signal. Data will only be recorded, if the programmed
gate condition is true.
Recording modes
Standard Mode
Data will be recorded as long as the gate signal fulfills the gate
condition that has had to be programmed before. At the end of
the gate interval the recording will be stopped and the board will
pause until another gates signal appears. If the total amount of
data to acquire has been reached the board stops immediately
(see figure). The total amount of samples to be recorded can be
defined by the memsize register.
The table below shows the register for enabling Gated Sam-
pling. For detailed information on how to setup and start the stan-
dard acquisition mode please refer to the according chapter
earlier in this manual.
When using Gated Sampling pretrigger is not available and postcounter has no function.
FIFO Mode
The Gated Sampling in FIFO Mode is similar to the Gated Sam-
pling in Standard Mode. In contrast to the Standard mode you
cannot programm a certain total amount of samples to be recor-
ded. The acquisition is running until the user stops it. The data is
read FIFO block by FIFO block by the driver. These blocks are
online available for further data processing by the user program.
The advantage of Gated Sampling in FIFO mode is that you can
stream data online to the hostsystem with a lower average data
rate than in conventional FIFO mode without gated sampling.
You can make realtime data processing or store a huge amount
of data to the hard disk. The table below shows the dedicated
register for enabling Gated Sampling. For detailed information how to setup and start the board in FIFO mode please refer to the according
chapter earlier in this manual.
Trigger modes
General information and trigger delay
Not all of the board’s trigger modes can be used in combi-
nation with Gated Sampling. All possible trigger modes are
listed below. Depending on the different trigger modes, the
chosen sample rate, the used channels and activated board
synchronisation (see according chapter for details about
synchronizing multiple boards) there are different delay
times between the trigger event and the first sampled data
(see figure). This start delay is necessary as the board is
equipped with dynamic RAM, which needs refresh cycles to
keep the data in memory when the board is not recording.
It is fix for a certain board setup. All possible delays in sam-
ples between the trigger event and the first recorded sample
are listed in the table below. A negative amount of samples
indicates that the trigger will be visible.
Register Value Direction Description
SPC_GATE 220400 r/w Enables Gated Sampling mode.
SPC_MEMSIZE 10000 r/w Defines the total amount of samples to record.
Register Value Direction Description
SPC_GATE 220400 r/w Enables Gated Sampling mode.